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NOIV1SN025KA
Binning Mode
The frame time for subsampled readout is given by the
following formula:
Frame Time = t FOT + (y-resolution / 2) x (t ROT x 2+ t readout
/ 2),
where t ROT represents the equivalent ROT time for a
normal readout of the same frame. Analogous readout
represents the equivalent readout time for normal readout.
In binning mode, the maximum frame rate in subsampled
readout of the full resolution of the sensor is ~110 fps.
Test Pattern Generation
The data block provides several test pattern generation
capabilities. Figure 36 shows the functional diagram for the
data channels. It is possible to inject synthesized test patterns
at various points. Refer to the Register Map on page 43 for
the test mode configuration registers (registers 144 to 150).
Table 33. TEST MODE SUMMARY
Register Configuration
In 8-bit mode, test patterns are generated as in 10-bit
mode, however the two least significant bits of the resulting
data are not transmitted.
The test pattern modes are summarized in Table 33. Note
that these modes only exist for the data channel. The sync
and clock channels do not provide this functionality.
For each test mode, the user can select whether the
generated data is framed. When the register
frame_testpattern is asserted, the test data simply replaces
the ADC data. This means that the test data is only sent
between frame/line start and frame/line end indications.
Outside these windows, regular training patterns are sent, as
during normal operation. CRC is calculated and inserted as
for normal data for the fixed and incrementing test pattern
generation.
prbs_en
0
0
testpattern_en
0
1
testpattern
X
0
Normal operation mode
Fixed pattern generation.
Description
Pattern is defined by testpattern register
0
1
1
X
1
X
Incrementing pattern generation.
Initial value is determined by testpattern .
PRBS data generation. The testpattern register determines the seed for the
PRBS generator.
When frame_testpattern is deasserted, the output is constantly replaced by the generated test data. No training patterns are
generated.
?
adc_db_data_0
Black Leve l
Calibration
CRC
Calculation
adc_db_data_1
Black Leve l
Calibration
`0'
`1'
`0'
`1'
`1'
`1'
`0'
Test Pattern
`1'
`0'
`0'
Generation
testpattern_er
PRBS
Generator
prbs_en
training pattern
( testpattern_en and not frame_testpattern )
insert CRC
bypass
Figure 36. Functional Block Diagrams for the Data Channels
NOTE: In the figure, register configurations are
indicated in red.
The sync channel continues to send regular frame timing
information when the sequencer is enabled (independently
The synthesized test patterns are injected directly into the
data channels. Therefore, no data demultiplexing is required
at the receiving end (as opposed to regular image data
capture).
of the test pattern configurations).
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